Resve Saleh is currently the NSERC/PMC-Sierra Chairholder in the Department of Electrical and Computer Engineering at UBC, working in the field of System-on-chip design, verification and test. He is currently focused on the topics of low-power, power grid, clock and interconnect design for SoCs. He holds PhD and MSc in electrical engineering from the University of California, Berkeley, and a BSc in electrical engineering from Carleton University. He received the Presidential Young Investigator Award in 1990 from the National Science Foundation in the United States.
Dr. Saleh an active member and Fellow of the IEEE and served as General Chair (1995), Conference Chair (1994), and Technical Program Chair (1993) for the Custom Integrated Circuits Conference. He recently held the positions of Technical Program Chair, Conference Chair and Vice-General Chair of the International Symposium on Quality in Electronic Design, and has served as Associate Editor of the IEEE Transactions on CAD. He recently co-authored a book entitled "Design and Analysis of Digital Integrated Circuit Design: In deep submicron technology."
Dr. Saleh was a founder and former Chairman of Simplex Solutions which developed CAD software for deep submicron digital design verification. Prior to starting Simplex, Dr. Saleh spent nine years as a Professor in the Department of Electrical and Computer Engineering at the University of Illinois in Urbana, and one year teaching at Stanford University. Before embarking on his academic career, Dr. Saleh worked for Mitel Corporation in Ottawa, Canada, Toshiba Corporation in Japan, Tektronix in Beaverton, Oregon, and Nortel in Ottawa, Canada.
| EECE 481 |
Digital Integrated Circuit Design Overview of deep submicron custom ic design. Advanced MOS models. IC fabrication. Timing and power calculations. Interconnect modeling and analysis techniques. Circuit-level design issues. SPICE circuit simulation. High-speed circuit design project. |
| 2010 |
Energy Optimization for Many-Core Platforms: Communication and PVT Aware Voltage-Island Formation and Voltage Selection Algorithm Journal Article | Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on |
| 2009 |
Simultaneous PVT-tolerant voltage-island formation and core placement for thousand-core platforms Conference Paper | System-on-Chip, 2009. SOC 2009. International Symposium on |
| 2009 |
Removal-Cost Method: An efficient voltage selection algorithm for multi-core platforms under PVT Conference Paper | SOC Conference, 2009. SOCC 2009. IEEE International |
| 2009 |
PVT Variation Impact on Voltage Island Formation in MPSoC Design Conference Paper | ISQED 2009: PROCEEDINGS 10TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, VOLS 1 AND 2 |
| 2009 |
Charge-borrowing decap: A novel circuit for removal of local supply noise violations Conference Paper | Custom Integrated Circuits Conference, 2009. CICC '09. IEEE |
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Electrical and Computer Engineering
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