Al-Shahna Jamal is a third year electrical and computer engineering student at the University of Toronto. Dr. Steven Wilton is supervising her summer research internship.
What project are you working on this summer?
Before I answer that question I have to tell you a little bit of history about how computer chips are made. When a company is creating an integrated circuit, a chip for a device like your laptop, they need to test it to death to ensure it works reliably before you buy it. Back in the day, testing something on a chip was quite difficult because the chips had to be fabricated before they were tested. The fabrication was expensive and could take many months and so mistakes were very costly. This cost was the impetus for developing an FPGA, a programmable chip that made testing the chip design prior to manufacture possible. The FPGA can be reprogrammed and debugged multiple times and effectively simulate the functions of the integrated circuit before the chip is manufactured.
That’s the hardware side of the story. The actual device that compiles the circuit and places it on the programmable chip is called a CAD tool, a computer aided design tool. The CAD tool uses hardware description languages, Verilog or VHDL to describe the circuit. The CAD tool compiles your hardware design, places it on the chip in an optimal way and then routes it.
I’m working on the CAD tool itself, helping to develop a better chip compiler. The goal of the project is to improve the way that it compiles the circuits to speed that process up and make it more clever. We would like to end up with a faster compilation run time and a faster circuit. Put another way, the project is trying to make the testing faster by speeding up the time it takes to write the chip to the FPGA and also improving the outcome of the test by doing a better job of writing the final circuit physically on the FPGA and creating a faster chip.
How can you improve the compiler?
When a circuit is written in Verilog the circuit is compiled into a flattened netlist. Any hierarchies I’ve described in the circuits are removed. When I write a circuit with all its hierarchy the CAD tool actually flattens the circuit, taking away all the hierarchy and dumps out this flattened netlist comprised of wires and nodes all over the place. The VPR CAD tool uses heuristic algorithms to figure out how to regroup related nets and nodes together into one big compact part so the resulting chip will have fewer wires and nodes in between sections of the circuit. That’s more manageable. In a sense one structure of the circuit is lost, by removing the hierarchies and then a second structure is created by clustering.
There are some really good algorithms to find circuit structure again. The algorithms are so efficient it is a good design solution to flatten the netlist and optimize it later using the algorithms. This can also remove any redundancies or other flabbiness in how the original circuit was written.
Dr. Wilton’s idea was this, what if we could go back to the Verilog design instead of using the algorithm to find the structure. I am going to go back to the writer’s Verilog, the actual written description and from there, seeing if I can piece together a structure and partition the circuit that way.
What benefits do you see in this new method of partitioning the circuit?
Some processes will be dealt with more quickly, like partitioning the circuit and hopefully using that way of finding structure will be quicker than heuristic algorithms; a faster compile time with the tool. That’s one of the benefits. Another benefit is that hopefully we’ll get a better placement of the circuit resulting in a faster running circuit.
How did you get this position?
I knew I wanted to get a research position because I’ve never done research; I’ve always worked in industry during the summer and I wanted to come back to my hometown, Vancouver for the summer. In the Fall semester, I started looking at the websites of professors working in computer hardware at UBC and SFU. I found Dr. Wilton by coming across papers he’s written. I didn’t understand very many of them because it’s higher level stuff. I contacted him through email to see if he would be interest in hiring an undergraduate student with my skills. We started talking about his research and whether my background was suitable.
Applying for research positions differs from applying for industry jobs because professors may be able to tailor the internship to your interests. That is a strength of research internships, the professor wants the student to shine in the area the student is interested in and the professors, your employers are teachers, they want to teach.
What skills did you bring to the internship?
I had a background working with FPGAs, the programmable chip, and also in designing circuits using the Verilog description language. So I was familiar with the hardware part of things.
Do you have any advise for students looking for research internships?
Students should talk to a number of professors, definitely make your reach far and wide. Professors are really busy and the research positions they have get filled up really fast. Start looking in the fall semester because professors need to plan what they will do with their funding,
What have you learned during the internship?
Dr. Wilton has a lot of grad students right now; I don’t necessarily work with them but we’re all in the same lab. It is a huge benefit to be working with them because I get to see everyone has different styles and different knowledge and some of grad students are really good at programming or giving me ideas. This research position has given me more of a reason to go to grad school; before the internship I had no idea what that really entailed. Now I see it’s a bigger version of the project I’m doing. And I really feel I should look toward doing a Masters program instead of going straight into industry.
And would you consider coming to UBC for your graduate work?
Yes, UBC’s ECE faculty has a really good computer engineering research base because there are a lot of research professors at UBC. The professors here are doing pretty cutting edge research and they’re teaching higher level courses based on their reach. If you’re working with a professor doing research in a field you’re interested in that obviously makes it better because they can guide you and give you ideas.
Read More:
NSERC Undergraduate Student Research Awards
System on Chip Laboratory